Verilog / VHDL Jobs

Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Hire Verilog / VHDL Designers

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    31 jobs found, pricing in INR

    I need a working code in Verilog that is able to successfully simulate, synthesize and generate bitstream on Xilinx Vivado for FPGA. The code should be able to implement a Convolutional Neural Network and take as input weights and biases from a pretrained model in Python and then use them to identify the 28x28 pixel test image from a MNIST database. Whatever digit is identified by the code, releva...

    ₹17297 (Avg Bid)
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    7 bids

    Hello. I need an Assembly MIPS Expert right now. Will provide details on pv.

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    4 bids

    Hi I need engineers who can program in stm32 microcontroller...

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    I need help to Create a skip instruction using VHDL. I will discuss more in chat.

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    vhdl program -- 2 6 days left
    VERIFIED

    • Make the Memory Map for the following configuration • 1 microprocessor 16 bits addresses • 1 Eprom (16 bits) and a RAM (16 bits) • 9 sensors described in the attached tables • 3 actuators described attached Indicate the addresses in Hexadecimal for each object • Make the VHDL code for the selection of objects • Draw the diagram (processor and other circuits)

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    Hi! I want to deploy a custom RISC-V processor on FPGA. There are two tasks: 1. Deploy the core to run C codes on it and blink an LED (the core is implemented in Verilog and synthesizable). 2. Boot Linux Kernel (files are ready). I want to deploy the processors on the ZCU102 Zynq MPSoC Board (Zynq UltraScale) FPGA.

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    I need someone fix verilog code and run it in nexys 2

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    I need someone who can fix verilog code and run it in nexys 2

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    Need a block diagram implemented in system verilog. All modules have been included in the zip file. The file [login to view URL] needs to be completed. There is also a testbench [login to view URL] included and a do file [login to view URL] to run in modelsim. Check [login to view URL] for full information.

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    I need someone who can fix verilog code and run it in nexys 2

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    SECURED PORTABLE ECG MONITOR FOR HIGH SENSITIVE PATIENT DATA PROTECTION USING AES ALGORITHM I need an AES encryption and decryption in C . Then I need to apply in FPGA to encrypt and decrypt an ECG signal data The input data will be an ECG signal ya Advanced Encryption Standard coding in C programming

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    SECURED PORTABLE ECG MONITOR FOR HIGH SENSITIVE PATIENT DATA PROTECTION USING AES ALGORITHM I need an AES encryption and decryption in C . Then I need to apply in FPGA to encrypt and decrypt an ECG signal data The input data will be an ECG signal ya Advanced Encryption Standard coding in C programming

    ₹733 - ₹2199
    ₹733 - ₹2199
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    Hi, I've the report and coding with further instruction. The freelancer needs to make the video of software simulation Video of State Machine Implantation; FPGA vs Microcontrollers in keil software ( [login to view URL]) Let me knock expert freelancer to get the job.

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    System Verilog Project 3 days left
    VERIFIED

    Need a block diagram implemented in system verilog. All modules have been included in the zip file. The file [login to view URL] needs to be completed. There is also a testbench [login to view URL] included and a do file [login to view URL] to run in modelsim. Check [login to view URL] for full information.

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    Ether Bitstream software 3 days left
    VERIFIED

    I am looking for someone who can design FPGA mining bitstreams . I'm looking for someone who can work with me long term . This is a very serious project. Looking for experienced FPGA programmer with Verilog skills that can develop bitstreams for BCU1525 (Xilinx VU9P) deployable on the Minerator shell. Equihash variants and X.. variants (x16r - requires changing two BCUs) would be highest prio...

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    VHDL tutorial 3 days left
    VERIFIED

    I need someone to help me explain some concepts on VHDL

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    I need help in Designing a full adder circuit to add octal digits. I will send more details in chat.

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    Make a binary adder that has a dividend of 8 bits, divisor of 4 bits, quotient of 4 bits and remainder of 4 bits. Must be long division by subtracting and shifting. Must also have a testbench that outputs the results asked for in the .pdf file.

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    I need the help of someone who could help me propose and implement an algorithm using constraints programming methods that supports formal verification of digital models that can be used on hardware models in c Precisely or VHDl,verilog, e.t.c, and also i will need a report proposal on this to get it approved its quite urgent please, your help would be highly appreciated

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    I need your help to Design a full adder circuit to add octal digits using VHDL.I will provide you more details in chat.

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    Looking for an experienced fpga engineer to help me get going with Verilog and just basic fpga planning, resource allocation , memory controllers, ip use. Multiple sessions [Removed by Freelancer.com Admin for offsiting - please see Section 13 of our Terms and Conditions] maybe 3 times a week 1 hour per session

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    VHDL , QUARTUS , MODELSIM ALTERA, QUESTASIM, UP DOWN COUNTER , COUNT ZERO COUNTER, CLOCK GENERATOR, RGB CONTROLLER. STATE MACHINE ...

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    VGA interface using VHDL 1 day left
    VERIFIED

    I want to have a logo in different colors on the VGA monitor.

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    I need Verilog Expert for explanation of a small task. further detail in inbx

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    I have a ASIC SHA256 BTC miner project that was started and is about 80% to 90% complete. The main control board was done with Xilinx chip and the hash boards use ASICs Current Work that needs to be DONE: 1. Check of all PCB to make sure correct? Was notified from manufacture that there is traces that go nowhere 2. Complete Xilinx firmware to work with the ASIC chips. Data sheet is available fo...

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    Hi, I have an accelerometer (I2C) and I want to read it and print the output on the terminal through UART. The code must be written in Verilog or SystemVerilog targeting Xilinx FPGAs. It will be tested in a Digilent Cmod A7.

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    Project on VHDL using Xilinx Vivado. Need some one expertise on Digital Design using Xilinx Vivado.

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    Please send message dor details.

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    Guaranteed
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    ASIC Verification Engineers 26 days left
    VERIFIED

    Seeking full-time experienced ASIC Verification Engineers for an ongoing project (12 months+) Essential requirements: Knowledge of at least one industry standard protocol like Ethernet, PCIe, MIPI, USB, AMBA or similar. Ability to update testbench components like reference model/SB, drivers and monitors. Team player with excellent interaction skills. Perl/shell scripting is a good to have. ...

    ₹1099 - ₹1759 / hr
    Sealed NDA
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    23 bids

    Este un proiect pentru facultate. Termenul este 17 mai 2021. Cerința detaliată a proiectului este în imagine. Mi-ar trebui documentația care să cuprindă cutia neagră a circuitului, descompunerea în Unitate de control și Unitate de Execuție, o listă cu resursele pe care le voi volosi (ex: generator de numere aleatoare), organigrama, implementare in VHDL și o schema logică pentru că prez...

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