Verilog / VHDL Jobs

Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Hire Verilog / VHDL Designers

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    17 jobs found, pricing in INR
    electrical_system_simulation 6 days left
    VERIFIED

    In this attached paper In figure :4 i want for 27 level and figure11,figure13,figure 14 Only this is Required

    ₹4470 (Avg Bid)
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    3 bids

    Implementation of convolution neural network using verilog

    ₹5290 (Avg Bid)
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    3 bids

    Anybody who has good experience of Verilog and it would be better if he had been using Xilinx ISE and iSim/ModelSim

    ₹9090 (Avg Bid)
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    12 bids

    Design a working prototype of the incremental backpropagation for DNN density networks in Matlab. The prototype development should include data structures for the input-to-hidden and hidden-to-output connections, and loops for the forward and backward pass.

    ₹2518 (Avg Bid)
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    3 bids

    Development to be performed on Vivado 2019.1 version using Xilinx Zynq 7020 in order to: - Acquire Galileo and GPS signals in real time (FFT and IFTT) - Track Galileo and GPS signals in real time (DLL and PLL) - Demodulation of the Galileo and GPS signals (bit synchronisation and demodulation) Timeline:30 days

    ₹107510 (Avg Bid)
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    11 bids

    I have an encoder and decoder developed in Verilog and need debugging

    ₹1937 / hr (Avg Bid)
    ₹1937 / hr Avg Bid
    3 bids

    I have an encoder and decoder developed in Verilog and need debugging

    ₹1416 / hr (Avg Bid)
    ₹1416 / hr Avg Bid
    6 bids

    I have an encoder and decoder developed in Verilog and need debugging

    ₹3725 / hr (Avg Bid)
    ₹3725 / hr Avg Bid
    1 bids

    This project is based on design and implementation of FMCW automotive radar system on Matlab Simulink and calculation of different parameter like speed ,distance and angle and converting signal processing block of radar system into HDL code and verifying the same scenario with same input. Later, optimization of generated HDL code and implementing HDL code into FPGA and verifying it with same inpu...

    ₹10133 (Avg Bid)
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    3 bids

    I want to know complete VLSI physical design flow in detail

    ₹2384 (Avg Bid)
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    2 bids

    Design a block diagram for a smart watch using vivado.

    ₹5290 (Avg Bid)
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    6 bids

    Design a block diagram for a smart watch using vivado.

    ₹1118 (Avg Bid)
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    2 bids

    I have a circuit, that in which I am using a relay to switch resistance if anyone could explain to me the way another possibility with the circuit, without any microcontroller to switch resistance with low cost and size, I want to switch 1.2ohm resistance to the existing circuit.

    ₹1341 (Avg Bid)
    ₹1341 Avg Bid
    11 bids

    The project is based on designing of automotive radar system using Matlab Simulink block and to perform speed, distance, angle of azimuth and angle of elevation estimation and then performing high level synthesis to generate RTL code of design using Matlab HDL coder tool. Optimization of different parameters like speed and distance using HLS directives of generated HDL code . Implementation and ve...

    ₹11623 (Avg Bid)
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    4 bids
    Computer science logic design 4 hours left
    VERIFIED

    Computer science logic design

    ₹7078 (Avg Bid)
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    19 bids

    Computer Science Arithmetic Logic Unit design

    ₹7748 (Avg Bid)
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    9 bids

    Three 32-bit registers RT, RS, RD, 16-bitIMM16, 32-bit Memory Address Register(MAR), 32-Bit Memory Data Register (MDR), design arithmetic logic unit comprised of ADD/SUB and Bitwise operations.

    ₹2459 (Avg Bid)
    ₹2459 Avg Bid
    4 bids