ASIC Design for Complex Multiplier -- 2

Completed Posted Sep 23, 2014 Paid on delivery
Completed Paid on delivery

I am looking for the VHDL code for this topic "ASIC Design for Complex Multiplier"

Verilog / VHDL

Project ID: #6497793

About the project

7 proposals Remote project Active Sep 26, 2014

Awarded to:

shobhitkapoor

Hi, I have bidded for $150 + freelancer charges, i will deliver you this project ontime. Thanks SK

$166 USD in 5 days
(4 Reviews)
4.0

7 freelancers are bidding on average $95 for this job

ahmedmohamed85

Dear sir I have more than 7 years experience in digital design using vhdl I can do the design with complete test bench in less than 1 day

$88 USD in 1 day
(96 Reviews)
6.8
zarnescugeorge

I can help you right away! Please accept my bid! You offered the project to other freelancer couple of day before, and I think that freelancer didn't a good job! I can offer you a clean, correct and better soluti More

$55 USD in 0 days
(6 Reviews)
3.6
kulwantsingh16

A proposal has not yet been provided

$70 USD in 2 days
(0 Reviews)
0.0
jeffdiala

I plan to tackle this project using verilog and adders as a replacement for multiplier since in ASIC multiplication operator is not that desirable. I have 5 years of experience working as an ASIC engineer so I am confi More

$55 USD in 3 days
(0 Reviews)
0.0
nani22633

A proposal has not yet been provided

$155 USD in 3 days
(0 Reviews)
0.0
bkowshick

I have done numerous research project on multiplier and have submitted a journal on 'reconfigurable multiplier' which could be used in most of the DSP applications. --I can use a portion of this code to get your job More

$77 USD in 1 day
(0 Reviews)
0.0