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I’m working on an FPGA-based power-electronics design that performs direct AC-to-AC conversion, and I’d like an experienced set of eyes on the project. Rather than a full redesign, I need targeted, practical suggestions that will help refine the existing architecture, tighten the control loops, and ensure the hardware description (VHDL/Verilog) and gate-level timing are truly aligned with the switching requirements of high-frequency power conversion. Here’s what I’m looking for: • A concise design review of the current top-level schematic, clocking scheme, and PWM generation logic. • Specific, actionable recommendations for improving efficiency, reducing switching losses, and safeguarding against common AC-to-AC pitfalls such as commutation overlap and shoot-through. • Guidance on test-bench strategies and simulation setups (ModelSim, Vivado, or your preferred tool) so I can stress the design under varying load and grid conditions before moving to hardware. • If you spot a critical issue, a short, commented code snippet or timing constraint example that shows how you would correct it will be invaluable. You don’t need to rewrite the whole design; clear, focused advice that I can implement myself is the goal. If this sounds like the kind of technical challenge you enjoy, let’s schedule a quick call so I can share the current project files and we can dive right in.
Project ID: 40413505
4 proposals
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Active 16 days ago
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4 freelancers are bidding on average $20 USD for this job

Hi, I can review your FPGA-based AC-to-AC design and provide clear, practical improvements ? I have experience with FPGA design (VHDL/Verilog), PWM control, and power electronics, so I understand the importance of timing accuracy, switching behavior, and efficiency. I’ll analyze your schematic, clocking, and PWM logic, then suggest targeted fixes to reduce losses, avoid shoot-through, and improve overall stability. I can also guide you on testbench setup and simulations to validate performance under real conditions. If needed, I’ll share small code snippets or timing constraints to help you implement changes quickly. Let’s connect and review your files together. Best regards, Engr. Muhammad Imran
$18 USD in 7 days
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i understand you need a focused FPGA design review to refine control, timing, and switching behavior without a full redesign #step1 i will review your top-level architecture, clock domains, and PWM generation to identify timing risks and inefficiencies #step2 i will analyze switching logic to reduce losses, avoid shoot-through, and improve commutation handling #step3 i will check VHDL/Verilog against timing constraints and suggest precise fixes where alignment is weak #step4 i will propose testbench strategies (ModelSim/Vivado) to simulate edge cases like load variation and grid instability i will provide clear, actionable notes plus small code/timing examples where needed timeline: 1–2 days for initial review after receiving files ready to dive deep and give practical improvements you can apply immediately Best regards
$20 USD in 3 days
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Hello, I have experience in FPGA-based control systems, power electronics, PWM architecture, VHDL/Verilog review, and timing-critical digital control for high-frequency switching applications. I can provide a focused technical review of your existing AC-to-AC conversion design, including top-level architecture, clock domains, PWM generation, dead-time strategy, commutation safety, and timing alignment with switching requirements. My review will target practical improvements for efficiency, switching-loss reduction, shoot-through prevention, and control-loop refinement without forcing a full redesign. I can also evaluate gate-level timing, constraint strategy, and synchronization issues that commonly impact high-frequency power conversion reliability. For validation, I can recommend robust testbench structures, simulation methodologies, and stress scenarios for varying load/grid conditions using ModelSim, Vivado, or equivalent tools. If critical issues are identified, I can provide concise corrected HDL snippets, timing constraints, or PWM/dead-time examples for direct implementation. My goal will be actionable engineering feedback that strengthens your design while keeping your architecture intact. I’m available to review your files and collaborate efficiently. Best regards, Engr. Muhammad Uzair
$21 USD in 6 days
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