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Using DDR3 RAM on Zynq with Vivado + VHDL

Simple Vivado project demonstrating the use of AXI DMA. The project must include a Vivado workflow with custom editable VHDL code that will use an AXI master to read/write directly to DDR ram from PL. In addition the PS must be able to read what is written from PL using the same shared DDR RAM.

Skills: Electrical Engineering, Embedded Software, FPGA, Microcontroller, Verilog / VHDL

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About the Employer:
( 2 reviews ) Fremont, United States

Project ID: #10569266

6 freelancers are bidding on average $14/hour for this job

ahmedmohamed85

Dear sir I have more than 9 years experience in digital design and I am a professional vivado designer in addition I already have Zedboard please check my profile also please message me so that we can discuss

$13 USD / hour
(243 Reviews)
7.5
Ars4r3Lancing

Project: Using DDR3 RAM on Zynq with Vivado + VHDL No problem, lets chat Sir Br, More

$15 USD / hour
(6 Reviews)
3.4
rohi1710rohi1710

Hi , I am working as FPGA design engineer since last 7 years and I have expertise in both verilog and VHDL. I can help you in this project

$12 USD / hour
(3 Reviews)
3.5
keelsayed

Hi, I am an MSc student in digital hardware design, I am experienced with Vivado and Vivado HLS and IP integrator. I have written four papers in digital hardware design with implementations done in Vivado. My work i More

$10 USD / hour
(1 Review)
1.5
sabirshah4545

We are a team of experts which deal with various projects such as: > writing >technical writing >Engineering > PCB designing >FPGA >Verilog /VHDL > MATLAB >Wolfram Mathematica >Mathematics >Calculus More

$12 USD / hour
(3 Reviews)
3.2
TechnocracyGopi

Hello There, I am a professional working in the same field. I use Vivado 2014.1. I can take care of your task. Please let me know what will be source of data or you want to write some dummy data? Thanks, Gopi

$16 USD / hour
(0 Reviews)
0.0
$15 USD / hour
(1 Review)
0.0
vijayabindusri

I have been using Zynq boards in our office from 2 years. I work for a Central Govt. organization. As part of one research project I have implemented a camera control unit on FPGA(PL) and wrote a software application f More

$17 USD / hour
(0 Reviews)
0.0