White noise generation on ADRV9009 via Zynq FPGA

This project aims to produce the signal with the desired bandwidth from a total of 4 tx ports (ADRV9009-A TX1,TX2; ADRV9009-B TX3,TX4). For this purpose, we have a PCB board containing 2 pieces of ADRV9009. The system works on Linux. We want to get white noise that can be adjusted bandwidth from TX ports. The produced bandwidth signal should be adjustable by commands given over Linux. For example, we want to produce a 100 mhz wide tx1 signal from 150 mhz wide tx2. Its modulation doesn't matter. It is enough to have a block signal. The bit file to be created will be written to fgpa pl on the sd card. The zynq model used is given in the block design above. If agreement is reached, technical data such as current vivado project and schematic can be shared. Project milestones; • Generation of 150 mhz bandwidth signal from one ADRV9009-A TX1 • Generation of 100 mhz bandwidth signal from one ADRV9009-B TX1 • Generation of 150 mhz bandwidth signal from one ADRV9009-A TX1,TX2 and Generation of 100 mhz bandwidth signal from one ADRV9009-B TX1,Tx2 • Setting the bandwidth between 50 MHZ to 450 MHZ via Linux